Memory decode logic for 68020 system. # date description by -- -------- ------------------------------------------ ---- 01 20/02/95 initial version BDJ 02 25/02/95 added word-access of bus using dtack BDJ 03 29/07/95 changed addresses to match rodime BDJ 04 24/08/95 extented address-space to ram2-3 BDJ The following memory-map is decoded mem from - to bus width /dsack1 /dsack0 ---- ------------------- ------------ ------ ------ ram0 0x000000 - 0x07FFFF 32 bits wide 0 0 ram1 0x080000 - 0x0FFFFF 32 bits wide 0 0 ram2 0x100000 - 0x17FFFF 32 bits wide 0 0 ram3 0x180000 - 0x1FFFFF 32 bits wide 0 0 rom 0xE00000 - 0xE0FFFF 8 bits wide 1 0 asynio 0xC00000 - 0xCFFFFF 8 bits wide 1 0 bus 0x800000 - 0xDFFFFF 16 bits wide 0 1 (c) Bas de Jong CHIP decode 20v8 ; 1 2 3 4 5 6 7 8 9 10 11 12 /map /as a23 a22 a21 a20 a19 a18 a17 a16 /dtack GND ; 13 14 15 16 17 18 19 20 21 22 23 24 ramdel romdel /ack0 /ack1 /bus /as1 nc /ram1 /ram0 /rom /ioack VCC @ues decode4 @define _rom " a23* a22* a21*/a20 * /a19*/a18*/a17*/a16 * as" @define _ram0 "/a23*/a22*/a21*/a20 * /a19 * as" @define _ram1 "/a23*/a22*/a21*/a20 * a19 * as" @define _ram2 "/a23*/a22*/a21* a20 * /a19 * as" @define _ram3 "/a23*/a22*/a21* a20 * a19 * as" EQUATIONS ram0 = _ram0 * /map ram1 = _ram1 rom = _rom * /map + _ram0 * map bus = a23*/a22 * as + ; page 8, 9, A and B a23* a22*/a21 * as ; page C and D ack0 = _ram0 * /map * ramdel + _ram1 * ramdel + _ram2 * ramdel + _ram3 * ramdel + _rom * /map * romdel + _ram0 * map * romdel + ioack ack1 = _ram0 * /map * ramdel + _ram1 * ramdel + _ram2 * ramdel + _ram3 * ramdel + a23*/a22 * dtack + a23* a22*/a21 * dtack + a23* a22* a21*a21 * dtack as1 = /as